ST

ABOUT
With two-and-a-half decades of experience as a photolithography engineer, including an extensive 18-year tenure at Texas Instruments, I’ve developed expertise in data analysis, process optimization, and defect trouble shooting. Throughout my career, I’ve been driven by a passion for efficiency, seeking innovative solutions to streamline processes and resolve yield limiting issues. As a result, I’ve had the opportunity to not only lead litho teams but also many cross-functional teams.

Example of engineering dashboard using Python data analysis tools.
Example Engineering Dashboard (Python-dash with plotly, pandas, and numpy for data tables and visualizations. Scikit learn models used to predict edge of wafer. Pair-wise Tukey HSD calculations used to run unit comparison and highlight deltas.)
Example of Tool Commonality Analysis (Used Python in Excel with various classification models to run commonality analysis)

DATA ANALYSIS SKILLSETS

Excel (with Python and VBA), Spotfire, Python, dash, colab, plotly, pandas, numpy, scikit-learn, JavaScript, SQL, Linux, JMP, Power BI, PowerPoint

EXPERIENCE
Process Engineer at Texas Instruments DMOS6 300mm Fab (2001-2019)

Lead photo engineer - Startup of TI’s first 300mm fab. Focused on 248nm/193nm CMOS Cu BEOL process and later qualified FeRAM and analog technologies
Tool sets: Qualified and optimized processes in Photo for i-line, 248nm, and 193nm layers on ASML scanners (450, 850, 1050), FSI/DNS RF3/TEL Lithius track, KLA bright field inspection (Stealth), KLA macro inspection (Viper), KLA Archer overlay, KLA Spectra, KLA CD SEM, and AMAT CD SEM.
Photo Process Ownership: Worked on solutions for top photo issues (both front end and back end of line). Owned 20+ levels with focus on BEOL that included both Cu damascene levels and Aluminum. Responsibilities included new process setup and characterization (including OPC), tool release, new device setups, sustaining, chart monitoring, Cp/Cpk improvements, optimization of coat, bake, develop, and rinse recipes for defect and CD improvements.
Created macro defect trouble shooting guide with help of equipment technicians to document common signatures: dirty nozzle, lake/puddle defect, off-centered dispense, incomplete coverage, etc.
Worked with chemical vendors and performed multiple resist/BARC evaluations for process improvements, defect reduction, and cost savings. Validated solvent strip test with BARC vendors for nozzle drying issues. Converted defect prone via fill products with cleaner, lower sublimation and lower cost alternatives. Converted Tmet pattern layers from 193nm process to 248nm with off-axis illumination for cost savings.
Experienced on both Photo and YE metrology (JEOL Tilt SEM, Stealth, Macro inspect, overlay, SEM). Wrote programs to automatically create metrology recipes for KLA Archer overlay to save significant man hours. Created recipes on KLA Stealth/Spectra for photo pattern inspections (used as tool monitors for defect and CD control).
Co-developed metrology sampling system implemented fab-wide for cycle time improvements.

Cross-Functional Team Leader (Back-End-Of-Line Engineering Group)

Responsible for coordinating fab equipment/process/integration/device/quality engineers to quickly and effectively resolve back-end-of-line issues. Including base-line yield improvements, controlling defect/electrical/scrap excursions, customer returns, qual fails, and other quality issues.
Reliability improvements through improved BEOL integration, blocked etch reduction, reduction in CVD thin film defects, wafer break reduction efforts, etc.

Change Control Board Member

Led weekly meetings to review engineering proposals for significant changes to equipment or process levels. Assessed the risk of proposed changes and worked with engineers to develop a safe plan for proceeding with on-product testing. Approval by change control team was required before running split lots, limited release, or full implementation of the changes.

OTHER EXPERIENCE

Application Engineer at Brewer Science (Rolla, MO) - Global support for customer issues with DUV BARC. Assisted customers with new product development and implementation of the product.
Photo Process Engineer at LSI Logic (Gresham, OR) - Started up LSI Logic first DUV process on DNS 200W with Nikon 201 1st generation scanner. Performed TEL ACT8/DNS tool evaluations.
Photo Process Engineer at TwinStar Semiconductor (Richardson, TX) - 200mm DRAM start up. Transferred DRAM technologies (i-line) from Hitachi and worked on key defect projects to achieve benchmark yields.

AWARDS

Member of TI Technical Staff
Patent award TI-61230, titled DI WATER RINSE OF PHOTORESISTS WITH INSOLUBLE DYE

EDUCATION

Colorado School of Mines ▪ B.S. in Engineering (Mechanical) 1995